Markus Fischer, Hanwha Q-Cells Germany, presented the update of the roadmap, which includes the level of technology maturity, at the 10th Solar World Congress in Shanghai. Besides the maturity level, which was implemented for selected parameters of crystallization, wafer manufacturing, cell production and module technology, the update deals with the current topic of the constantly growing wafer size.
Standardization of wafer size of great interest
The ITRPV already considers the development of different wafer sizes annually and showed in the issue published in March that this area is characterized by a variety of new formats. For German equipment manufacturers, a standardization of the wafer size is of great interest. But what exactly is the situation regarding the implementation of alternative wafer sizes in existing production lines? This question should be answered in the ITRPV update.
The results show that only wafer sizes smaller than M4 can be implemented in existing lines without major modifications. Starting with wafer size M4, an implementation is only possible with upgrades of existing lines, while new lines are required for the installation of wafers with sizes M6 and larger.
This trend is consistent in the production of mono- and multicrystalline silicon wafers as well as in cell and module production.
Capacity difference in front-end and back-end processes
The annual survey of technology maturity for various selected parameters in the manufacturing of crystalline silicon solar cells generally indicates whether improvement measures can be implemented more quickly in mass production or whether further R&D work is required before introducing certain technologies into mass production. The color marking is used to distinguish between four levels of maturity.
An essential factor for cost reduction and thus also for competitiveness is the throughput of different plants. When considering chemical and thermal processes as well as metallization and classification processes, a large capacitive difference in the potential throughput can be observed. The throughput of nearly 9000 wafers per hour in the front-end processes (chemical and thermal) is expected to be implemented in 2021 without major adjustments in mass production. On the other hand, the back-end processes clearly show that the throughput capacity of 6000 wafers per hour already requires further development work.
An update of the 10th edition of the International Technology Roadmap for Photovoltaics (ITRPV) is now available for download. (HCN)
